Ingénieur FPGA
À propos du poste
La mission de Sentrycs est de permettre un avenir plus riche en drones !
Comment ?
Grâce à notre solution intégrée de lutte contre les drones, nous aidons les forces de l'ordre, les prisons, les infrastructures critiques, les aéroports, les événements de masse, les convois, les forces armées et bien d'autres encore, en leur fournissant une protection 24/7 contre les drones. Grâce à notre technologie entièrement autonome, facilement portable et prête pour l'UTM, la détection et l'atténuation des drones non autorisés n'ont jamais été aussi simples.
Nous nous efforçons de protéger la société contre les regards non autorisés dans le ciel afin que vous puissiez rester opérationnel et assurer la continuité de vos activités au sol. Construisons ensemble un avenir où les drones auront toute leur place !
As a Senior FPGA & System Architecture Engineer, you will drive the end-to-end hardware architecture and implementation of next-generation wireless communications systems. You will lead the design and integration of high-throughput physical layer pipelines across AMD Xilinx RFSoC platforms, high-speed PCIe interfaces, and host GPU acceleration environments—bridging algorithmic signal processing with production-grade SoC hardware infrastructure.
Dans ce rôle, vous devrez
- Architect & Design: Own the full-chip system architecture on AMD Xilinx RFSoC platforms.
- DSP RTL Implementation: Partner directly with Algorithm Engineers to translate floating-point MATLAB/C++ models into fixed-point, resource-optimized, and bit-exact SystemVerilog RTL.
- Host & GPU Acceleration Interfacing: Architect and implement high-bandwidth PCIe subsystems connecting the RFSoC to host CPU and GPU accelerators, ensuring deterministic data streaming, low-latency DMA transfers, and reliable link initialization during system boot.
- Verification & Hardware Bring-Up: Lead bit-accurate simulation, hardware emulation, and lab bring-up using Vivado, logic analyzers, and RF test equipment to profile throughput, validate timing closure, and eliminate real-time system bottlenecks.
Exigences
L'ingénieur FPGA idéal que nous recherchons doit avoir
- SoC & FPGA Mastery: Proven, hands-on experience architecting and delivering production designs on AMD Xilinx Zynq UltraScale+ RFSoC or MPSoC platforms.
- HDL & RTL Implementation: Expert-level proficiency in synthesizable SystemVerilog ou Verilog, with a strong focus on high-speed pipelining, timing closure in congested designs.
- Host Interfacing & Data Movement: Demonstrated experience implementing high-bandwidth PCIe subsystems (Gen3/Gen4) and high-throughput DMA engines (e.g., XDMA/QDMA), including link training/enumeration bring-up, boot sequencing, and backpressure management.
Un plaisir à avoir
- RF-DC Subsystem Integration: Hands-on experience configuring and integrating AMD Xilinx RF-Data Converters (multi-gigasample ADCs/DACs) and their associated digital down/up-conversion chains.
- DSP Hardware Design: Strong foundation in implementing fixed-point wireless communications algorithms in FPGA fabric (e.g., polyphase filter banks, multi-rate DDC/DUC, FFT/IFFT, channel estimation, correlation) with efficient DSP slice mapping and dynamic range management.
- Driver & Software Alignment: Familiarity with Linux kernel drivers, user-space drivers (VFIO/UIO, DPDK), or embedded software running on the ARM Processing System to coordinate hardware-software control planes.